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FuriosaAI
Design Verification Engineer
Seoul, Seoul, South KoreaPosted 9 months agofulltime
What you'd do
- Define and implement block,IP,and SoC verification plans and test benches
- Develop functional tests based on defined verification plans and coverage metrics
- Drive design verification to closure using functional and code coverage metrics
What they want
- Hold a bachelor's degree in electrical engineering,computer science,or a related field
- Bring 3 or more years of block,IP,sub-system,or SoC level verification using SystemVerilog and UVM
- Apply experience with EDA tools and scripting languages such as Python,TCL,Perl,and shell
Nice to have
- Master's degree in electrical engineering or computer science
- Experience developing UVM verification environments from scratch
- Experience verifying high-speed interfaces such as PCIe,UCIe,or DDR
Seoulstart's read
- Visa tier (likely)
- E-7 specialty / professional (likely)
- Korean language
- Korean requirement not stated
- English friendliness
- High: JD in English, foreign-friendly signals
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