DeepX
Mixed-Signal IP Design Engineer
Seoul, South KoreaPosted 10 days ago
What you'd do
- Design and develop mixed-signal IPs including PLL, DLL, LDO, ADC/DAC, high-speed SerDes.
- Perform schematic design, circuit simulation, post-layout verification across PVT corners.
- Collaborate with layout engineers on floorplanning, matching, parasitic reduction optimization.
What they want
- Bachelor's, Master's, or Ph.D. in Electrical Engineering or related technical field.
- In-depth understanding of CMOS process technologies and analog design fundamentals.
- Hands-on experience with Cadence Virtuoso, Spectre, Hspice, FineSim EDA tools.
Nice to have
- Experience with FinFET process nodes (14nm, 7nm, 5nm advanced nodes).
- Expertise in high-speed signaling and SerDes architecture (PCIe, MIPI, DDR).
- Proficiency in behavioral modeling using Verilog-A or SystemVerilog.