Hardware - Design Verification Engineer
New roles land in Following.
Seoul, South KoreaPosted 1 month ago
Market pay check
Matched to Computer systems and software professionals
Source: Ministry of Employment and Labor wage information system (wage.go.kr), wage distribution by occupation.
What you'd do
- Define and implement block,IP,and SoC verification plans and test benches
- Develop functional tests aligned with the verification test plan
- Drive design verification closure using metrics,functional,and code coverage
What they want
- Bachelor's degree in EE,CS,or other related technical field
- Three plus years block,IP,sub-system,or SoC verification with SystemVerilog UVM
- Experience with EDA tools and scripting Python,TCL,Perl,Shell for verification flows
Nice to have
- Master's degree in EE,CS,or other related technical field
- Experience developing UVM based verification environments from scratch
- IP or integration verification for high-speed interfaces PCIe,UCIe,or DDR
Seoulstart's read
- Visa tier (likely)
- E-7 specialty / professional (likely)
- Korean language
- Korean not required