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DeepX
CPU Subsystem Engineer
Seoul, South KoreaPosted 4 months ago
What you'd do
- Integrate ARM or RISC-V based CPU IP into AI SoC platforms with focus on connectivity.
- Design high-speed on-chip interconnects using AMBA protocols for low-latency data paths.
- Define and optimize L2/L3 caches,Snoop Control Units,and memory controller integration.
What they want
- 5+ years experience in SoC integration or RTL design.
- Bachelor's or Master's degree in Electrical Engineering or Computer Engineering.
- Proficiency in Verilog and SystemVerilog.
Nice to have
- FPGA implementation experience.
- Hands-on experience with Network-on-Chip IP (Arteris,ARM CoreLink).
- Knowledge of UPF/CPF based power intent and multi-voltage domain integration.
Seoulstart's read
- Visa tier (likely)
- E-7 specialty / professional (likely)
- Korean language
- Korean preferred (conversational)
- English friendliness
- High: JD in English, foreign-friendly signals