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DeepX
PHY Engineer
Seoul, South KoreaPosted 4 months ago
What you'd do
- Lead design,implementation,and integration of high-speed interface PHY IPs (LPDDR4/5,PCIe Gen4/5,MIPI D-PHY/C-PHY).
- Conduct signal integrity and power integrity simulations for robust high-speed data transmission.
- Participate in silicon bring-up,debugging,and characterization of PHY IPs for standards compliance.
What they want
- Bachelor's,Master's,or Ph.D. in Electrical Engineering,Electronic Engineering,Computer Engineering,or related field.
- Minimum 5+ years of relevant experience in high-speed analog/mixed-signal or PHY-related RTL design.
- Deep understanding of high-speed serial/parallel interface protocols (DDR,PCIe,MIPI,USB).
Nice to have
- Hands-on experience with advanced process nodes (7nm,5nm,or below) at Samsung or TSMC.
- Proven track record of successful tape-outs and silicon validation for high-speed PHY IPs.
- Familiarity with automotive functional safety standards (ISO 26262) and AEC-Q100 requirements.
Seoulstart's read
- Visa tier (likely)
- E-7 specialty / professional (likely)
- Korean language
- Korean requirement not stated