NoC (Network-on-Chip) Design Engineer
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Seoul, South KoreaPosted 6 months ago
Market pay check
Matched to Computer systems and software professionals
Source: Ministry of Employment and Labor wage information system (wage.go.kr), wage distribution by occupation.
What you'd do
- Design and implement NoC architecture for high-performance AI accelerators.
- Optimize on-chip interconnects for power,performance,and area (PPA).
- Conduct performance modeling and simulation to analyze throughput,latency,and congestion.
What they want
- Bachelor's,Master's,or Ph.D. in Electrical Engineering,Computer Engineering,or related field.
- Proven RTL design experience (Verilog/SystemVerilog) in complex SoC environments.
- In-depth understanding of on-chip communication protocols (AMBA AXI,ACE,CHI).
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Nice to have
- Experience with commercial NoC IP (Arteris,NetSpeed/Sifive) or custom NoC development.
- Knowledge of AI/Machine Learning hardware acceleration and data flow requirements.
- Proficiency in scripting languages (Python,Perl,Tcl) for design automation.
Seoulstart's read
- Visa tier (likely)
- E-7 specialty / professional (likely)
- Korean language
- Korean requirement not stated